按照俺的经验,如果是1.6MM厚的板的话,差分线外层线宽5MIL,线距7MIL,内层线宽5MIL,线距10MIL可以达到100欧姆的差分阻抗。
单端走线外层7MIL,内层6MIL可以达到50欧姆的阻抗。
叠层如下:
TOP ----------------------------SIGNAL 1.9mil
2116 4.5mil
LAYER2-------------------------- GND 1.2mil
core 8mil
LAYER3-------------------------SIGNAL(主) 1.2mil
2116*2 7.8mil
LAYER4--------------------------- GND 1.2mil
core 14mil
LAYER5--------------------------POWER 1.2mil
2116*2 7.8mil
LAYER6-------------------------SIGNAL(主) 1.2mil
core 8mil
LAYER7--------------------------GND 1.2mil
2116 4.5mil
BOTTOM--------------------------SIGNAL 1.9mil
桃花岛主 发表于 2010-7-19 22:17
铜皮厚度不变,层间距变小,对EMC影响如何? 对SI影响如何?
首先假设你的说法成立,因为从PCB工艺上说 ...
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