有意者请将中英文简历发至hzeng@nvidia.com;(请注明应聘职位)
工作地区:上海
Job Description:
Responsiblefor all aspects of physical design and implementation of GPU, and otherASICs targeted at the desktop, laptop, workstation, and mobile markets
Participating in efforts to establish CAD, design methodologies, and flow automation
Working on floorplan, power/clock distribution, chip assembly, placement, routing and timing closure
Working on static timing analysis, power/noise analysis and back-end verification
Minimum Requirement:
BSEE, MSEE is preferred
Project experience in VLSI physical design implementation
Courses taken in circuit design, device modeling, and digital design
Knowledge of device model, processing technology, timing, noise and power in chip design
Hand-on experience in EDA software from Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter) or Magma (Talus) is preferred
Proficient user of Perl or TCL is preferred
工作内容:
负责芯片物理设计及其实现的所有工作 (绘图芯片, 以及 桌面/笔记本/工作站/手持设备 等ASIC芯片)
参与超深亚微米CAD, 设计方法,设计流程自动化的建立
致力于:
芯片规划及布局
电源/时钟分布及规划
布局布线及封装
芯片时序收敛
静态时序分析
功耗/噪声/信号完整性分析及后端验证
要求:
电子工程或相关专业硕士生或本科生
有VLSI芯片设计经验
有相关课程背景:电路设计,器件模型,数字电路
拥有以下知识:器件模型,制造工艺,时序检查,功耗及噪声分析
有相关EDA工具使用经验:Synopsys (PC/ICC/DC/PT/STAR-RC), Cadence (First Encounter), Magma (Talus)
具有脚本编写能力者优先:Perl, TCL
招聘人数:若干 |