附带一点以前看过的资料，不翻译了自己看看，还可以练习英文，呵呵。
1. Reduce intra-pair skew in a differential trace by introducing small meandering corrections at the point of mismatch.
2. Reduce inter-pair skew, caused by component placement and IC pinouts, by making larger meandering correction along the signal path. Use chamfered corners with a length-to-trace width ratio of 3 to 5. The distance between bends should be at least 8 to 10 times the trace width.
3. Use 45o bends (chamfered corners), instead of right-angle (90o) bends. Right-angle bends increase the effective trace width, which changes the differential trace impedance creating a small discontinuity. A 45o bends is seen as an even smaller discontinuity.
Figure 7. Skew reduction via meandering using chamfered corners
4. When routing around an object, route both trace of a pair in parallel. Splitting the traces changes the line-to-line spacing, thus causing the differential impedance to change and discontinuities to occur.
Figure 8. Routing around an object
5. Place passive components within the signal path, such as source-matching resistors or ac-coupling capacitors, next to each other. Routing as in case a) does create wider trace spacing than in b); however, the resulting discontinuity is limited to a far narrower electrical length.
Figure 9. Lumping discontinuities
6. When routing traces next to a via or between an array of vias, make sure that the via clearance section does not interrupt the path of the return current on the ground plane below.
Figure 10. Avoiding via clearance sections
7. Avoid metal layers and traces underneath or between the pads of the HDMI connectors for better impedance matching. Otherwise they may cause the differential impedance to drop below 75 and fail your board during TDR testing.
Figure 11. Keeping planes out of the area between edge-fingers
8. Use the smallest size possible for signal trace vias and HDMI connector pads as they have less impact on the 100 differential impedance. Large vias and pads can cause the impedance to drop below 85 .
9. Use solid power and ground planes for 100 impedance control and minimum power noise.
10. For 100 differential impedance use the smallest trace spacing possible, which usually is specified by your PCB vendor. Make sure that the geometries in Figure 5 are: s < h, s < W, W < 2h, and d > 2s. Even better, use a 2D field solver to determine the trace geometries more accurately.
11. Keep the trace electrical length between the HDMI connector and the device as short as possible to minimize attenuation.
12. Use good HDMI connectors whose impedances meet the specifications.
13. Place bulk capacitors, (i.e., 10 ¼F), close to power sources, such as voltage regulators or where the power is supplied to the PCB.
14. Place smaller 0.1 ¼F or 0.01 ¼F capacitors at the device.
15. Reference Planes
The power and ground planes of a high-speed PCB design usually must satisfy a variety of requirements. At DC and low frequencies they must deliver stable reference voltages, such as Vcc and ground, to the supply terminals of integrated circuits and termination resistors.
16. At high frequencies reference planes, and in particular ground planes, serve numerous purposes. For the design of controlled impedance transmission systems, the ground plane should provide strong electric coupling with the differential traces of an adjacent signal layer. As mentioned earlier, close coupling causes the magnetic fields to cancel, thus minimizing EMI through reduced TEM wave radiation of the remaining fringing fields. To accomplish close coupling, place the ground plane next to a high-speed signal layer. |
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